And encoder is a combinational circuit that does the other way around.An 8 to 3 encoder could do exactly reverse of above 3 to 8 decoder.There can be 8 inputs and each of them can be encoded into a 3 bit binary output.How is an encoder different from a multiplexer?What is a priority encoder and how is it different from a simple encoder?A priority encoder on the other hand encodes inputs with more than one bit being high using a priority.What is a ring oscillator?Therefore, for two transitions it takes 6 times inverter delay.1.4 Sequential Circuits and State MachinesIn Asynchronous sequential circuits, the transition from one state to another is initiated by the change in the primary inputs without any external synchronization like a clock edge.It can be considered as combinational circuits with feedback loop.Explain the concept of Setup and Hold times?What is meant by clock skew?The difference of this time is known as clock skew.For a given sequential circuit as shown below, assume that both the flip flops have a clock to output delay = 10ns, setup time=5ns and hold time=2ns.Also assume that the combinatorial data path has a delay of 10ns.In other words, when the enable signal is high, the contents of latches changes immediately when inputs changes.What is a race condition?Where does it occur and how can it be avoided?When an output has an unexpected dependency on relative ordering or timing of different events, a race condition occurs.Hardware race condition can be avoided by proper design techniques.SystemVerilog simulators don’t guarantee any execution order between multiple always blocks.In above example, since we are using blocking assignments, there can be a race condition and we can see different values of X1 and X2 in multiple different simulations.This is a typical example of what a race condition is.If the second always block gets executed before
